The global transition in energy infrastructure, accelerated by ambitious carbon neutrality goals, has positioned the electric car as a central pillar of sustainable transportation. The widespread adoption of the electric car is intrinsically linked to the performance and availability of its charging infrastructure. Contemporary charging power supplies for electric cars often grapple with significant limitations, including suboptimal energy conversion efficiency (typically below 88% at full load), insufficient power density (often struggling to exceed 2 kW/L), and pronounced electromagnetic interference (EMI). These shortcomings directly impede the development of high-power fast-charging technology, failing to meet user demands for rapid charging speeds and equipment reliability. Consequently, the research and development of charging power supplies that are highly efficient, compact, and exhibit excellent electromagnetic compatibility (EMC) has become a critical challenge for the industry.
Previous research has extensively explored topology optimization for charging power supplies, yet significant limitations persist. The traditional Phase-Shifted Full-Bridge (PSFB) converter suffers from primary-side circulating current losses and hard-switching effects, leading to a marked decline in efficiency at higher switching frequencies—efficiency can drop by over 5% at frequencies above 30 kHz. The current spikes induced by hard switching not only increase the stress on power semiconductors like IGBTs but also generate severe EMI, necessitating additional, complex filter circuits. To achieve soft-switching, the common approach of placing parallel capacitors across the leading-leg switches can achieve Zero-Voltage Switching (ZVS). However, this method often fails to maintain stable ZVS under light-load conditions and increases reactive power loss. Other studies have attempted to use secondary-side active clamp circuits to improve the switching conditions of the lagging leg. While this can reduce losses to some extent, the introduction of additional active components increases circuit complexity, cost, and control difficulty. Furthermore, existing wireless charging systems are limited by their energy transfer method, with power density (around 1.2 kW/L) and efficiency (approximately 85%) insufficient for high-power fast-charging scenarios for electric cars.
Addressing these challenges, this study proposes a novel high-efficiency topology based on PSFB soft-switching technology. The core innovation involves implementing ZVS for the leading bridge arm using parallel capacitors, while simultaneously solving the ZCS challenge for the lagging bridge arm through a simple secondary-side passive clamping circuit. This topology effectively reduces switching losses, enhances overall system efficiency, mitigates EMI through optimized circuit parameters and component selection, and improves system robustness. It avoids the hard-switching losses of traditional topologies and the complexity of active-clamp schemes, simplifying the circuit structure and reducing cost—a vital consideration for scalable electric car charging infrastructure.
Topology and Operational Principle Analysis
The proposed charging system for electric cars begins with a 380 V three-phase AC input, which is first converted to a pulsating DC voltage via an uncontrolled rectifier module. This DC voltage is then smoothed by a low-frequency LC filter network composed of \( L_i \) and \( C_i \) to eliminate high-frequency noise. Subsequently, it is processed by the core phase-shifted modulated full-bridge conversion circuit and an output filter module to finally produce high-quality regulated DC power for charging the electric car battery. The main power topology is shown in the functional diagram, where switches \( Q_1 \) and \( Q_3 \) form the leading bridge arm, and \( Q_2 \) and \( Q_4 \) form the lagging bridge arm. \( L_r \) represents the transformer leakage inductance. The turns ratio is denoted by \( n \). The secondary-side passive clamp network consists of diode \( D_B \), diode \( D_C \), and the clamp capacitor \( C_C \).
To analyze the working principles, we assume the filtered DC input voltage is \( V_{in} \), and all components are ideal. The leading-leg capacitors \( C_1 \) and \( C_3 \) are equal, denoted as \( C_{lead} \). The output filter inductance \( L_f \) is sufficiently large to be treated as a constant current source \( I_L \), and the output filter capacitance \( C_f \) is large enough to be considered a constant voltage source \( V_o \). One complete switching cycle can be divided into several distinct operational modes.
Operational Mode Analysis
Mode 1 [\(t_0\), \(t_1\)]: At \(t_0\), the primary current \(i_p(t)\) and voltage \(v_{ab}(t)\) are zero. All secondary rectifier diodes \(VD_1\) to \(VD_4\) are conducting. When switch \(Q_4\) is turned on, the leakage inductance \(L_r\) prevents an instantaneous current rise, allowing \(Q_4\) to achieve Zero-Current Switching (ZCS) turn-on. The secondary winding is effectively short-circuited, applying \(V_{in}\) across \(L_r\). The primary current rises linearly:
$$ i_p(t) = \frac{V_{in}}{L_r} (t – t_0) $$
This mode ends at \(t_1\) when \(i_p(t_1) = I_L / n\). The duration is:
$$ \Delta t_{01} = \frac{I_L L_r}{n V_{in}} $$
Mode 2 [\(t_1\), \(t_2\)]: Switches \(Q_1\) and \(Q_4\) are on. The input voltage \(V_{in}\) is applied to the primary, delivering power to the load. The auxiliary diode \(D_C\) becomes forward-biased, clamping the rectifier output to \(V_o\). The clamp capacitor \(C_C\) begins to resonate with \(L_r\), storing energy. Its voltage rises from zero. The governing equations are:
$$ v_{Cc}(t) = \left( \frac{V_{in}}{n} – V_o \right) \left[ 1 – \cos(\omega_a (t-t_1)) \right] $$
$$ i_{Cc}(t) = C_C \omega_a \left( \frac{V_{in}}{n} – V_o \right) \sin(\omega_a (t-t_1)) $$
$$ i_p(t) = \frac{I_L}{n} + \frac{C_C}{n^2} \omega_a (V_{in} – nV_o) \sin(\omega_a (t-t_1)) $$
where the resonant angular frequency is \( \omega_a = \frac{n}{\sqrt{L_r C_C}} \). This mode lasts for half of this resonant period: \( \Delta t_{12} = \pi / \omega_a \).
Mode 3 [\(t_2\), \(t_3\)]: At \(t_2\), the resonance ceases, and the current through \(D_C\) naturally falls to zero, allowing it to turn off softly. The primary current remains constant at \(I_L/n\), and power is transferred directly from input to output. The clamp capacitor voltage is now:
$$ v_{Cc}(t_3) = 2 \left( \frac{V_{in}}{n} – V_o \right) $$
Mode 4 [\(t_3\), \(t_4\)]: At \(t_3\), \(Q_1\) is turned off. Because the parallel capacitor \(C_1\) has zero initial voltage, \(Q_1\) achieves Zero-Voltage Switching (ZVS) turn-off. The primary current \(i_p\), approximately constant at \(I_L/n\), begins to charge \(C_1\) and discharge \(C_3\). The primary voltage \(v_{ab}\) decreases linearly:
$$ v_{C1}(t) = \frac{I_L}{n (C_1 + C_3)} (t – t_3) $$
$$ v_{C3}(t) = v_{ab}(t) = V_{in} – \frac{I_L}{n (C_1 + C_3)} (t – t_3) $$
The secondary rectifier voltage follows: \( v_{rec}(t) = \frac{v_{ab}(t)}{n} \). This mode ends at \(t_4\) when \(v_{rec}(t)\) falls to the clamp capacitor voltage \(v_{Cc}(t_3)\).
Mode 5 [\(t_4\), \(t_5\)]: When \(v_{rec}(t)\) equals \(v_{Cc}\), diode \(D_B\) turns on. The clamp capacitor \(C_C\) now clamps the secondary voltage and supplies energy to the load. The leakage inductance energy continues to charge \(C_1\) and discharge \(C_3\). At \(t_5\), capacitor \(C_3\) is fully discharged, and the body diode of \(Q_3\) begins to conduct, preparing for the ZVS turn-on of \(Q_3\).
Mode 6 [\(t_5\), \(t_6\)]: The primary current freewheels through the body diode of \(Q_3\). The voltage of clamp capacitor \(C_C\) is now reflected to the primary side across \(L_r\), causing the primary current \(i_p(t)\) to resonate back to zero. This reset action is crucial for achieving ZCS in the lagging leg.
Mode 7 [\(t_6\), \(t_7\)] & Mode 8 [\(t_7\), \(t_8\)]: Once \(i_p\) reaches zero, the primary side is disconnected. The load current is solely supplied by the discharge of clamp capacitor \(C_C\) until its voltage reaches zero. Subsequently, all secondary rectifier diodes conduct again.
Mode 9 [\(t_8\), \(t_9\)]: At \(t_8\), with primary current at zero, switch \(Q_4\) can be turned off with ZCS. After a brief dead time, \(Q_2\) is turned on with ZCS at \(t_9\) because \(L_r\) limits the current rise rate. The circuit then enters the symmetric second half of the switching cycle.
Main Circuit Design for Electric Car Charger
Given the diverse specifications of electric car power batteries regarding capacity, maximum charge current, and voltage, a universal DC fast charger must be designed to accommodate a wide range. The proposed charger is specified to meet the demands of a typical high-power electric car charging station.
| Parameter | Specification |
|---|---|
| Input | Three-phase, 380 VAC ±10%, 50 Hz |
| Output Voltage Range | 0 – 600 V DC (continuously adjustable) |
| Output Current Range | 0 – 60 A DC (continuously adjustable) |
| Maximum Output Power | 36 kW |
| Full-load Efficiency Target | > 90% |
| Output Ripple | < 0.5% peak-to-peak (Voltage & Current) |
| Full-load Power Factor | > 0.9 |
| Switching Frequency | 25 kHz |
Based on these specifications and the operational analysis, the key components of the ZVZCS phase-shifted full-bridge converter are designed and selected as follows:
| Component & Symbol | Value / Model | Component & Symbol | Value / Model |
|---|---|---|---|
| Input DC Voltage (\(V_{in}\)) | ~540 V | Power Switch (IGBT) | GD300HFL |
| Leading-leg Capacitor (\(C_1, C_3\)) | 77 nF | Lagging-leg Capacitor | 77 nF |
| Rectifier Diode | DSEI210112A | Resonant Inductor (\(L_r\)) | 15 µH |
| Transformer Turns Ratio (\(n\)) | 0.68 | Clamp Capacitor (\(C_C\)) | 0.56 µF |
| Input Filter Inductor (\(L_i\)) | 500 µH | Output Filter Inductor (\(L_f\)) | 0.39 mH |
| Output Filter Capacitor (\(C_f\)) | 80 µF | Nominal Output (\(V_o\), \(I_L\)) | 584 V, 20 A |
| Switching Frequency (\(f_s\)) | 25 kHz | Duty Cycle (\(D\)) | ~48% |
Control System Implementation
The control system is architected around an STM32F103 microcontroller, which serves as the digital control core for the electric car charger. Its peripherals facilitate key functions including output voltage/current regulation, protection, PWM generation, and user interface.
| Feature | Specification |
|---|---|
| Core | ARM® Cortex®-M3 32-bit |
| Max Frequency | 72 MHz |
| Flash Memory | Up to 128 KB |
| SRAM | 20 KB |
| A/D Converter | 16 channels, 12-bit resolution |
| Timers/PWM Channels | Advanced-control timers for PWM generation |
| Communication Interfaces | I2C, SPI, USART, CAN |
Hardware Design
IGBT Gate Drive: Utilizing the specialized driver chip M57962AL, the circuit provides isolated, high-current capability gate signals with desaturation protection and under-voltage lockout (UVLO) features essential for reliable IGBT operation in the demanding electric car charging environment.
Signal Sensing: High-voltage and high-current signals are isolated and scaled using Hall-effect sensors. The CHV-25P voltage sensor and HNC-200US current sensor provide accurate, galvanically isolated measurements of output voltage and current, which are then conditioned through op-amp based scaling and filtering circuits before being fed to the microcontroller’s ADC.
Protection Circuits: A comprehensive protection suite ensures the safety and longevity of the charger for electric cars.
- Over-temperature Protection: Uses a temperature sensor (e.g., HC-PL4505 optocoupler) mounted on the heatsink to shut down the PWM drives if a critical temperature is exceeded.
- Output Over-voltage Protection (OVP): Monitors the scaled output voltage via a comparator. If the voltage exceeds a preset threshold, a fault signal latches and disables the controller.
- Output Over-current Protection (OCP): Similar to OVP, it monitors the output current signal and triggers a shutdown if the current limit is breached, protecting both the charger and the electric car battery.
Software Architecture
The control firmware is developed in C language within the Keil MDK environment, employing a modular structure for clarity and maintainability. The main tasks include:
- System Initialization: Configures clocks, GPIOs, ADCs, timers (for PWM), and communication peripherals.
- Main Control Loop:
- Reads output voltage \(V_o\) and current \(I_o\) via ADC.
- Executes a voltage PI control algorithm: $$ D_{new} = D_{old} + K_p \cdot e_v + K_i \cdot \sum e_v $$ where \(e_v = V_{ref} – V_o\), and \(D\) is the phase-shift duty cycle.
- An outer current limit loop modulates \(V_{ref}\) to maintain \(I_o \leq I_{max}\).
- Calculates and updates the PWM registers for the four IGBTs with appropriate dead-time insertion.
- Protection Monitoring: Continuously checks fault flags from hardware protection circuits and software-based limits.
- Communication & Interface: Manages LCD display updates, keypad inputs, and potential CAN communication for smart charging protocols with the electric car.
Simulation and Performance Analysis
A detailed simulation model of the proposed topology was constructed in MATLAB/Simulink to validate the theoretical analysis and performance predictions before hardware implementation. The model parameters correspond to those listed in Table 2. Key simulation waveforms at a nominal output of 600V, 20A are analyzed below.
The gate drive signals for switches \(Q_1\), \(Q_4\), \(Q_3\), and \(Q_2\) confirm the phase-shifted operation with a duty cycle near 48% and a switching frequency of 25 kHz. The designed dead-time is clearly observable between complementary switches.
The output voltage and current waveforms are stable and well-regulated, with the voltage maintained at the 600 V reference and the current at 20 A. The ripple content is minimal, confirming the effectiveness of the output filter design.
The primary-side operational waveforms are most revealing. The primary voltage \(v_{ab}(t)\) shows the characteristic stepped shape. The primary current \(i_p(t)\) demonstrates the key advantages of the proposed ZVZCS topology:
- Absence of Current Spike: Due to the secondary passive clamp, the turn-on current spike commonly seen in hard-switched bridges is eliminated.
- Current Reset to Zero: Before the commutation of the lagging-leg switches (\(Q_2\) and \(Q_4\)), the primary current is naturally reset to zero by the resonant action involving \(L_r\) and \(C_C\). This is evident from the waveform falling to zero during the freewheeling period, enabling true ZCS turn-off for these switches.
- ZVS for Leading Leg: The linear transition of \(v_{ab}(t)\) during the period when \(i_p\) is constant indicates the charging/discharging of the parallel capacitors (\(C_1, C_3\)), which facilitates ZVS for the leading-leg switches (\(Q_1\) and \(Q_3\)).
The secondary rectifier voltage \(v_{rec}(t)\) shows the clamping action, which limits voltage stress on the rectifier diodes.
Conclusion and Comparative Assessment
This study has successfully developed and analyzed a high-performance charging power supply topology based on a phase-shifted full-bridge ZVZCS converter, specifically tailored for the demanding requirements of modern electric car charging. The integration of a secondary-side passive clamp network proves to be an elegant and effective solution for achieving lagging-leg ZCS, while traditional leading-leg parallel capacitors ensure ZVS. The performance of the proposed system is summarized and compared with conventional approaches in the table below.
| Performance Metric | Proposed ZVZCS-PSFB Topology | Traditional Hard-Switched PSFB | PSFB with Active Clamp | Target / Result |
|---|---|---|---|---|
| Full-load Efficiency | High | Low (High switching loss) | Moderate to High | > 90% (Achieved) |
| Switching Loss | Minimal (ZVS & ZCS achieved) | Very High | Reduced (ZVS only typical) | Dramatically Reduced |
| Primary Circulating Current | Eliminated during reset | Significant (Major loss source) | Reduced but present | Effectively Solved |
| EMI Generation | Low (Soft switching, no spikes) | Very High (from di/dt, dv/dt) | Moderate | Substantially Mitigated |
| Device Voltage/Current Stress | Controlled, no turn-on spike | High turn-on current spike | Controlled | Reduced Stress |
| Circuit Complexity & Cost | Low (Only passive add-ons) | Low | High (Extra active switch & control) | Simplified, Cost-Effective |
| Output Power / Power Factor | 36 kW / 0.95 | Limited by losses | Similar high power possible | Meets Electric Car Fast-Charge Demand |
| Control Difficulty | Moderate (Standard PS control) | Simple | Complex (Dual-loop control) | Manageable |
The simulation results and comparative analysis confirm that the proposed topology effectively addresses the core challenges of efficiency, power density, and EMI in electric car charging power supplies. By achieving both ZVS and ZCS, it minimizes switching losses, enabling higher frequency operation for reduced magnetic component size and increased power density. The elimination of primary circulating current and current spikes directly enhances efficiency and reliability while simplifying EMI filtering requirements. Crucially, it accomplishes this with a simpler and more cost-effective structure than alternative active-clamp solutions.
This research provides a viable, high-performance topological solution for the next generation of electric car charging infrastructure. The validated design, combining efficient soft-switching operation with practical simplicity, offers significant potential to accelerate the deployment of fast, reliable, and affordable charging stations, thereby supporting the broader global adoption of the electric car.